Other Methods of Power reduction

Having looked at the various methods and techniques that can be applied at the architectural level of the design and the verification challenges thus involved and before moving ahead with the introduction to UPF which makes it easy ,there are other areas like Low power Logic synthesis, software based power reduction.There could be more areas apart from this,we would update the blog as and when we understand them.


Low Power Logic Synthesis:This includes state assignment,retiming,logic minimization and technology remapping for low power in the design.State encoding has formed one of the crucial areas where it not only accounts for area minimization but also for power reduction.Based on a couple of research studies conducted, reduction of switching activity of the input state lines of a next state logic during state assignment formed one of the key areas for power reduction and Minimum Weighted hamming Distance encoding like gray coding forms one of the solutions to reduce that switching activity and thus the power.Apart from this there had been proposals of using T-Flip Flops in the design because it results in natural clock gating and would also result in reduced next state logic complexity.Sometimes a combination of T-Flip Flop and D- Flip Flop had also turned out to be one of the approaches to use , where the T-Flip Flop is usef on high switching activity bit lines thus reducing the combinatorial logic realization and thus the power consumtption;and D-flip flop on low switching activity bit lines for it's easier to implement and also simulatneously reduces the power .

Apart from the mentioned above ,low power retiming is also one approach to reduce the dynamic power consumption which is performed by the synthesis tool which is based on the calculation of the power reduction by relocating the registers while having a calculation of the glitches thus produced due to the relocation of register and the switching activity of the sequential circuit.


Software based Power Reduction Method: Take an example of a CPU in our PC.While we had been concentrating on various techniques to reduce the power on the CPU,it's the software that executes on the CPU that determines its power consumption.

A simple example for an inefficient software could be something that includes "busy wait loops".There could be an application like SpreadSheet or a Word document that waits for the user inputs,and during those times the spreadsheet or the word document would be simply recalculating the values thus using the CPU in high power activity, while it's expected to be in "inactive" state until the user types in the value.This inefficient behaviour is accounted by the "busy wait loops" executed by the software on the CPU.Thus power-aware software have come into the industry that understands the hadware activity and acts accordingly in mitigating the power consumtption of the system.